1. Field of the Invention
The present invention relates to a method for assembling electric components on a flexible substrate.
The present invention further relates to an apparatus for assembling electric components on a flexible substrate.
The present invention further relates to an assembly of an electric component with a flexible substrate.
2. Related Art
Flexible electronic products become more and more important, for example in the form of smart textiles, flexible displays and the like. Flexible electronic products mostly require the incorporation of semiconductor devices to steer and monitor various aspects of the device. As electronic devices generally become more and more complex, also the chips that steer them tend to become more and more complex. This results in higher IO counts, lower pitches and linewidths. This will in turn also result in higher requirements towards the placement accuracy of the integrated circuit when bonding. Apart from semiconductor devices other electric components, also batteries may have to be integrated with the flexible electronic product. The desired flexibility of the product often requires the placement and interconnection of thinned (<30 μm) Si chips. Typically required placement accuracies are in the order of 10-20 μm. These semiconductor devices and other electric components have a substantially smaller lateral size than the surface at which they are mounted. This prohibits the use of machinery that is normally used to laminate various foils together. Instead pick&place equipment has to be used to place these electric components.
A roll to roll manufacturing process is desired. Potentially this allows assembly of the electronic product in large sizes and quantities at low costs, e.g. using production processes such as presently used in the paper printing industry.
The placement of large amounts of chips with a high accuracy on a continuously moving belt would require quite advanced and expensive equipment. Furthermore, each chip would need to be bonded individually which could take seconds per chip.
Assembling methods are known that allow components to be placed with less accuracy by estimating a position of contacts of the components after their placement and adapting the connections to the estimated position.
In this respect it is noted that GB 2 313 713 describes a high-density mounting method for making an electronic circuit board. Therein a stud bump is formed on a connection terminal of a semiconductor chip. The semiconductor chip is buried in a printed circuit board such that the stud bump has a height almost equal to that of a surface of the printed circuit board. At least a surface of the printed circuit board where the semiconductor chip is buried is covered with a first insulating layer. Holes are formed in the first insulating layer by using a laser to expose the stud bump. A circuitry pattern is selectively formed on the first insulating layer, thereby connecting the circuitry pattern and the exposed stud bump to each other, and to other circuitry on the surface of the board.
It is further noted that US2007/230103 provides a method and apparatus for integrating electronic components on conductor tracks as well as corresponding electronic components. The disclosed method and apparatus allow the electronic component to be applied with less precision on a printing material such as a substrate to be printed or a printed product. After placement of the component, its position is determined by a sensor system, e.g. a camera system. In a subsequent processing step, one or more printing units print conductor tracks. The conductor tracks are oriented through registration of the printing unit or the conveyor mechanism to the previously applied electronic component.
WO/2010/071426, corresponding to EP2200412 A1 describes a method for manufacturing a flexible electronic product, the method comprising the steps of providing a flexible foil with a first and a second, mutually opposite main side, placing a component at the first foil at the first main side, the component having at least one electrical terminal facing towards the second main side, estimating a position of the at least one electrical terminal, adaptively forming a conductive path to the at least one electrical terminal, based on said estimated position.
According to an embodiment of the known method the conductive path is adaptively formed by forming a groove at the second main side of the foil and filling said groove with a conductive material or a precursor thereof.
In another embodiment the conductive path is formed by applying an adhesive layer and by converting the conductivity properties of the adhesive in a conversion zone thereof. The position and/or orientation of the conversion zone is dependent on the estimated position.
The processes of filling individual grooves in the first embodiment is relatively time consuming. The second embodiment requires relatively expensive materials. Accordingly, there is a need for a method, requiring relatively simple materials, which allows for a larger manufacturing throughput and which significantly relaxes the requirements for the chip placement alignment accuracy.
US2009/158232_provides a method comprising: examining the location of one or more feature(s) of component(s) of a circuit arrangement to determine a displacement of the location of communication contact(s) with respect to a designed location for the communication contact(s) of the components. Subsequently corrective communication path layout data of said circuit arrangement is provided based upon the said displacement(s). Then the communication path is applied according to the corrected communication path layout data.